Introduction to LPDDR5

2022-02-16 12:55:03

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On February 2019, 2, JEDEC (Solid State Storage Association) officially released JESD20-209, a new low-power memory standard for Low Power Double Data Rate 5 (LPDDR5). Compared to the first generation of the LPDDR5 standard released in 2014, the I/O speed of LPDDR4 has doubled from 5 MT/s to 3200 MT/s (DRAM speed 6400Mbps). If it matches the 6400-bit bus common to high-end smartphones, it can transmit 64.51GB of data per second; if it is a 2-bit BUS of the PC, it breaks 128GB per second without pressure.

The Solid State Association believes that LPDDR5 has the potential to significantly improve the performance of the next generation of portable electronic devices (mobile phones, tablets). To achieve this improvement, the standard redesigned the LPDDR5 architecture and moved to a programmable and multi-clock architecture up to 16 banks. At the same time, two commands that reduce data transfer operations, Data-Copy and Write-X, were introduced to reduce overall system power consumption. The former can directly copy data from a single pin to other pins, while the latter reduces the power consumption of the SoC and RAM when transmitting data. In addition, LPDDR5 also introduces link ECC error correction, the signal voltage is 250mV, and the Vddq/Vdd2 voltage is still 1.1V.

LPDDR4 consumes more than 5% less power than LP20x, has a deep sleep mode in terms of power consumption, and a dynamic-scale application mode, which is important to support core operation and power supply to provide better service to end users.

This means that the battery life of the end product will be extended. For example, compared with LPDDR4x, if LPDDR5 runs at a transmission speed of 5.5Gbps, the battery life of the mobile phone can be extended by 5%~10%. If it runs at the highest transmission rate of 6.4Gbps, the battery life of the mobile phone can be increased by more than 10%, that is, it can achieve a full day of battery life.

LPDDR5 DRAM uses dynamic voltage scaling (DVS) to save even more power. At this point, the memory controller can reduce the frequency and voltage of the DRAM during channel standby. LPDDR DRAM channels are typically 64 or 16 bits wide compared to a normal standard DDR DRAM channel (32 bits wide). As with the other two DRAM generations, each subsequent generation of LPDDR5, LPDDR4/4X, LPDDR3, LPDDR2, LPDDR) has higher performance and lower power consumption than its predecessor. In addition, any two generations of LPDDR are not compatible with each other.

With the arrival of 5G, LPDDR5 will also be its opponent, it is expected that by the end of 2020, most of the mainstream flagship opportunities will have LPDDR5, from 2021 to 2022, mid-to-high-end 5G smartphones will need to be equipped with LPDDR5, whether looking at mobile phone sales or quality, from 2022 to 2023, LPDDR5 will become the mainstream of the market.

LPDDR5 enables today's most advanced mobile applications, which often require very high bandwidth, exceeding the maximum bandwidth that LP4 can provide. For example, if you are using an LPDDR4 flagship phone, the high-pixel camera inside takes a few seconds to complete processing and storage. If you use LPDDR5, this will be a seamless process. If you run multiple applications at the same time, such as shooting videos, playing AI games, sharing screens, etc., there is likely to be a problem when using LPDDR4, but not for LPDDR5.

On February 2019, 2, JEDEC released JESD19-209, the Low Power Double Data Rate 5 (LPDDR5) standard.

Samsung announced in July 2018 that it had a working prototype LPDDR7 chip. LPDDR5 introduces the following changes: